Custom Search 1
Vergos Haridimos
Academic Rank:
Professor
Email:
Telephone(s):
+30 2610 996 924
Research:
Haridimos T. Vergos @ Google Scholar
- Digital circuits and systems design
- Arithmetic circuits for redundant number systems
- Testing, design for testability and BIST design
- Low power circuits design and low power testing
- Fault tolerant circuits and systems design
- IP core watermarking
Office Hours:
Monday:
11:00-12:45
Tuesday: 8:00-12:45
Wednesday: 8:00-12:45
Thursday: 8:00-12:45
Member of this department