Vergos Haridimos

Academic Rank: 
+30 2610 996 924

Haridimos T. Vergos @ Google Scholar

  • Digital circuits and systems design
  • Arithmetic circuits for redundant number systems
  • Testing, design for testability and BIST design
  • Low power circuits design and low power testing
  • Fault tolerant circuits and systems design
  • IP core watermarking


Office Hours: 
Monday: 11:00-12:45
Tuesday: 8:00-12:45
Wednesday: 8:00-12:45
Thursday: 8:00-12:45
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