Modern Topics in Computer Architecture

Α. Lectures and Tutorials

 Data path and control unit design:

• single-cycle implementation
• multi-cycle implementation

 Pipelining

• Organization
• Performance
• structural, data and procedural hazards
• hazard solution techniques

5. NOP instructions
5. pipeline stages stall
5. bypassing
5. delayed branch instructions
6. branch prediction techniques
   • static prediction techniques
   • dynamic prediction techniques
7. Pipeline data path design

 Cache memory:

• fetch policie
• organization
• replacing policies
• update policies

 Virtual memory:

• Implementation
  5. paging (single level page table, multilevel page table, inverted page table)
  5. segmentation
  5. segmentation and paging
  5. Translation Lookaside Buffer (TLB)

 cache memory in the virtual and in the physical space

 Superscalar processors

• true data dependencies
• artificial data dependencies
• register renaming
• issue rate
  5. in-order issue
  5. out of order issue
• sequential consistency
  5. weak sequential consistency
  5. strong sequential consistency
  5. reorder buffer

 Very Long Instruction Word, VLIW, processors

 Multithreading at processor level

 Multi-core processors

Β. Laboratory

The laboratory exercises are based on the use of a simulator of a microprogrammable computer, developed in our laboratory, running on a Windows environment. The students have the opportunity to design a machine language instruction set and then to write the necessary microprograms which implement the designed instruction set. After loading the microprograms into the control memory the students can write programs using the machine language, which they have designed and implemented, and run them in the microprogrammable computer.