Special Topics in Digital Systems Design

Course outline

• Introduction:
  • The need for testing
  • Verification testing vs. manufacturing testing
  • Parametric testing
  • Logic testing
    5. Functional testing
    5. Structural testing
  • periodic testing,
  • Test issues
  • Problems of testing
  • Test economics
• Part I.TESTING
  • Failures, Defects and Fault Models:
    5. Terminology
    5. Failure Classification
    5. Failure Rate Vs Product Lifetime
    5. Fault models: Stuck-at Faults, Bridging Faults, Stuck-Open Faults, Stuck-On Faults, Delay Faults
  • Fault Simulation:
    5. Logic simulation versus Fault simulation
    5. Fault Simulation, Fault Coverage
    5. Fault Dictionary
    5. Compiled versus event driven simulators
    6. Several implementations (Serial, Parallel, Deductive and Concurrent fault simulators)
  • Testability Measures (SCOAP),  
  • Test Pattern Generation:
    5. Exhaustive
    5. Pseudoexhaustive
    5. Pseudorandom (PR)
    5. Deterministic (D-Algorithm, PODEM, FAN Fujiwara, Critical paths) tests.

• Part II. DESIGN FOR TESTABILITY (DFT)
  • General guidelines
  • test point insertion
  • Pseudoexhaustive testing,
  • Scan Path Design Techniques:
    5. Types of storage devices
    5. Types of scan
    5. Cost of Scan
    5. Parallel scan
    6. Partial Scan
• Built-In Self-Test (BIST):
  • Test pattern generation
  • Response compression
  • Architectures for Test per-clock and Test per-scan BIST
• Test Data Compression):
  • Variable-to-fixed (Run-length etc)
  • Variable-to-variable (Golomb etc)
  • Fixed-to-variable (Huffman etc)
  • Fixed-to-fixed (LFSR seeds).
• Memory testing
• Digital boundary scan, IEEE Std. 1149.1)
• IEEE STD 1500 for testing embedded cores, SOC/IP Core Testing, Test Scheduling.