Special Topics in Digital Systems Design

Course Code: 
CEID_NE5668
Period: 
Spring Semester
Instructors: 
Credit Points: 
5

Course outline

  • Introduction:
    • The need for testing
    • Verification testing vs. manufacturing testing
    • Parametric testing
    • Logic testing
      1. Functional testing
      2. Structural testing
    • periodic testing,
    • Test issues
    • Problems of testing
    • Test economics
  • Part I.TESTING
    • Failures, Defects and Fault Models:
      1. Terminology
      2. Failure Classification
      3. Failure Rate Vs Product Lifetime
      4. Fault models: Stuck-at Faults, Bridging Faults, Stuck-Open Faults, Stuck-On Faults, Delay Faults
    • Fault Simulation:
      1. Logic simulation versus Fault simulation
      2. Fault Simulation, Fault Coverage
      3. Fault Dictionary
      4. Compiled versus event driven simulators
      5. Several implementations (Serial, Parallel, Deductive and Concurrent fault simulators)
    • Testability Measures (SCOAP),  
    • Test Pattern Generation:
      1. Exhaustive
      2. Pseudoexhaustive
      3. Pseudorandom (PR)
      4. Deterministic (D-Algorithm, PODEM, FAN Fujiwara, Critical paths) tests.
  • Part II. DESIGN FOR TESTABILITY (DFT)
    • General guidelines
    • test point insertion
    • Pseudoexhaustive testing,
    • Scan Path Design Techniques:
      1. Types of storage devices
      2. Types of scan
      3. Cost of Scan
      4. Parallel scan
      5. Partial Scan
  • Built-In Self-Test (BIST):
    • Test pattern generation
    • Response compression
    • Architectures for Test per-clock and Test per-scan BIST
  • Test Data Compression):
    • Variable-to-fixed (Run-length etc)
    • Variable-to-variable (Golomb etc)
    • Fixed-to-variable (Huffman etc)
    • Fixed-to-fixed (LFSR seeds).
  • Memory testing
  • Digital boundary scan, IEEE Std. 1149.1)
  • IEEE STD 1500 for testing embedded cores, SOC/IP Core Testing, Test Scheduling.

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