My research studies how modern computing systems can be made more reliable, efficient, and trustworthy by connecting microarchitectural mechanisms with system-level behavior. I work across CPUs, GPUs, heterogeneous systems, RISC-V systems, and domain-specific and AI accelerators, with particular emphasis on hardware reliability and Silent Data Corruptions, microarchitecture-level fault injection, silicon and post-silicon validation, processor and memory microarchitecture, and microarchitectural modeling and simulation.
I also study how failures observed in real systems relate to the microarchitectural mechanisms that cause or propagate them: where corrupted state originates, how it crosses abstraction layers, when it is masked, and when it becomes a system-level failure. This perspective also informs my work on robust and energy-efficient computing.
My work has appeared in ISCA, MICRO, HPCA, and other leading computer architecture and dependability venues. It has received nine HiPEAC Paper Awards, the 2022 IEEE Transactions on Computers Best Paper Award, and the 2023 TTTC/ITC Gerald W. Gordon Student Award. My research experience includes European FP7, Horizon 2020, and Horizon Europe projects, as well as collaborations with IBM Research, Intel, AMD, and Meta.
Research
Architecture from mechanisms to systems
My research connects microarchitectural mechanisms with measurable system behavior, treating reliability, correctness, performance, and energy efficiency as first-class design concerns.
Processor & Memory Architecture
Execution, speculation, branch prediction, out-of-order processing, caches, virtual memory, and the data-movement bottlenecks that shape modern processors.
Hardware Reliability & SDCs
Transient and permanent faults, architectural vulnerability, fault propagation, Silent Data Corruptions, and resilient operation across CPUs, GPUs, and accelerators.
Post-Silicon Validation
Architecture-informed methods for exposing, diagnosing, and localizing subtle hardware design errors in complex processor designs.
GPUs & Specialized Accelerators
Reliability, performance, and energy modeling for GPUs, heterogeneous systems, and domain-specific and AI accelerators.
RISC-V & Architectural Modeling
ISA and microarchitecture exploration, reproducible full-system evaluation, and architectural modeling using gem5 and related infrastructures.
Energy-Efficient Computing
Hardware operating margins and chip, core, and workload variability as opportunities for improving efficiency without compromising dependability.
Funded research
Research Projects
European and industry-funded projects spanning reliability, validation, energy efficiency, RISC-V, heterogeneous computing, and emerging accelerators.
Horizon Europe
NEUROPULS
Neuromorphic Energy-Efficient Secure Accelerators based on Phase Change Materials Augmented Silicon Photonics.
From architecture fundamentals to research practice
Four undergraduate courses connecting machine-level reasoning, quantitative architecture, systems programming, and modern microarchitectural design.
CEID_23Υ203 · Core · Fall · 4 ECTS
Computer Architecture
Builds a quantitative understanding of computer architecture through RISC-V, including ISA and assembly, performance evaluation, computer arithmetic, single-cycle datapath and control, introductory pipelining, and cache memories.
Connects computer architecture with parallel systems and programming through processes, threads, OpenMP, SIMD/vectorization, memory hierarchies, multicore coherence, and compiler-driven performance optimization.
Applies RISC-V architecture through programming and experimentation with RARS and Ripes, including procedures, stack and heap, exceptions, pipeline visualization, dependencies, and performance-aware instruction scheduling.
Examines modern processor performance through pipelines, branch prediction, out-of-order and superscalar execution, Tomasulo scheduling, prefetching, cache and virtual-memory behavior, and hands-on architectural modeling.
Peer-reviewed research spanning computer architecture, hardware reliability, validation, energy-efficient computing, GPUs and accelerators, and emerging computing systems.
Peer-Reviewed Journal Papers
10
G. Papadimitriou and D. Gizopoulos, “Silent Data Corruptions: Microarchitectural Perspectives”, IEEE Transactions on Computers (IEEE TC), Volume: 72, Issue: 11, pp. 3072-3085, November 2023
P. R. Bodmann, G. Papadimitriou, R. L. Rech Jr, D. Gizopoulos, and P. Rech, “Soft Error Effects on Arm Microprocessors: Early Estimations Versus Chip Measurements”, IEEE Computer (IEEE MC), Volume: 56, Issue: 7, pp. 4-6, July 2023
G. Papadimitriou and D. Gizopoulos, “Anatomy of On-Chip Memory Hardware Fault Effects Across the Layers”, IEEE Transactions on Emerging Topics in Computing (IEEE TETC), Volume: 11, Issue: 2, pp. 420-431, April–June 2023
P. R. Bodmann, G. Papadimitriou, R. L. Rech Jr, D. Gizopoulos, and P. Rech, “Soft Error Effects on Arm Microprocessors: Early Estimations vs. Chip Measurements”, IEEE Transactions on Computers (IEEE TC), Volume: 71, Issue: 10, pp. 2358–2369, October 2022
Featured Paper in the October 2022 issue of IEEE TC
Selected to appear in IEEE Computer's “Spotlight on Transactions" column – July 2023 Issue
2022 Best Paper Award from IEEE Transactions on Computers
P. Nikolaou, Y. Sazeides, A. Lampropulos, D. Guilhot, A. Bartoli, G. Papadimitriou, A. Chatzidimitriou, D. Gizopoulos, K. Tovletoglou, L. Mukhanov, and G. Karakonstantis, “On the Evaluation of the Total-Cost-of-Ownership Trade-offs in Edge vs Cloud deployments: A Wireless-Denial-of-Service Case Study”, IEEE Transactions on Sustainable Computing (IEEE T-SUSC), Volume: 7, Issue: 2, pp. 334-345, April–June 2022
P. Koutsovasilis, C. D. Antonopoulos, N. Bellas, S. Lalis, G. Papadimitriou, A. Chatzidimitriou, and D. Gizopoulos, “The Impact of CPU Voltage Margins on Power-Constrained Execution”, IEEE Transactions on Sustainable Computing (IEEE T-SUSC), Volume: 7, Issue: 1, pp. 221-234, January-March 2022
G. Papadimitriou, A. Chatzidimitriou, D. Gizopoulos, V. J. Reddi, J. Leng, B. Salami, O. S. Unsal, and A. C. Kestelman, “Exceeding Conservative Limits: A Consolidated Analysis on Modern Hardware Margins”, IEEE Transactions on Device and Materials Reliability (IEEE TDMR), Volume: 20, Issue: 2, pp. 341-350, June 2020
A. Chatzidimitriou, G. Papadimitriou, and D. Gizopoulos, “HealthLog Monitor: Errors, Symptoms and Reactions Consolidated”, IEEE Transactions on Device and Materials Reliability (IEEE TDMR), Volume: 19, Issue: 1, pp. 46-54, March 2019
M. Kaliorakis, A. Chatzidimitriou, G. Papadimitriou, and D. Gizopoulos, “Statistical Analysis of Multicore CPUs Operation in Scaled Voltage Conditions”, IEEE Computer Architecture Letters (IEEE CAL), Volume: 17, Issue: 2, pp. 109–112, July–Dec. 2018
G. Papadimitriou, A. Chatzidimitriou, D. Gizopoulos, and R. Morad, “An Agile Post-Silicon Validation Methodology for the Address Translation Mechanisms of Modern Microprocessors”, IEEE Transactions on Device and Materials Reliability (IEEE TDMR), Volume: 17, Issue: 1, pp. 3-11, March 2017
Peer-Reviewed Conference Papers
42
A. Nezhadi, O. Chatzopoulos, M. Mayahinia, G. Papadimitriou, M. Tahoori, and D. Gizopoulos, “Sisyphus: Cross-Layer Efficiency Across NVM Technologies in Compute-in-Memory Architectures”, IEEE International Test Conference (ITC 2025), San Diego, CA, USA, September 21-26, 2025
F. Kotsimpou, G. Papadimitriou, and D. Gizopoulos, “Evaluating ECC for Cache Reliability Under Multi-Bit Upsets: A Design Space Exploration”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2025), Ischia, Italy, July 7-9, 2025
M. Trakosa, O. Chatzopoulos, G. Papadimitriou, and D. Gizopoulos, “NAVIgator: Exploring the Voltage Limits of AMD NAVI GPUs for Energy Efficient Computing”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2025), Ischia, Italy, July 7-9, 2025
O. Chatzopoulos, G. Papadimitriou, D. Gizopoulos, H. Dixit, and S. Sankar, ”From Gates to SDCs: Understanding Fault Propagation Through the Compute Stack”, Design, Automation, and Test in Europe (DATE 2025), Lyon, France, March 31 – April 2, 2025
O. Chatzopoulos, N. Karystinos, G. Papadimitriou, D. Gizopoulos, H. D. Dixit, and S. Sankar, “Veritas – Demystifying Silent Data Corruptions: μArch-Level Modeling and Fleet Data of Modern x86 CPUs”, IEEE International Symposium on High-Performance Computer Architecture (HPCA 2025), Las Vegas, NV, USA, March 1-5, 2025
HiPEAC Paper Award
M. Alonso, D. Andreu, R. Canal, S. Di Carlo, O. Chatzopoulos, C. Chenet, J. Costa, A. Girones, D. Gizopoulos, G. Papadimitriou, E. Morancho, B. Otero, and A. Savino, “Security and RAS in the Computing Continuum”, IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2024), Oxfordshire, UK, October 8-10, 2024
L. Yang, G. Papadimitriou, D. Sartzetakis, A. Jog, E. Smirni, and D. Gizopoulos, “GPU Reliability Assessment: Insights Across the Abstraction Layers”, IEEE International Conference on Cluster Computing (CLUSTER 2024), Kobe, Japan, September 24-27, 2024
Best Paper Candidate
T. Macieira, S. Gurumurthy, S. Gurumurthi, A. Haggag, G. Papadimitriou, and D. Gizopoulos, “Silent Data Corruptions in Computing: Understand and Quantify”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2024), Rennes, Brittany, France, July 3-5, 2024
N. Karystinos, O. Chatzopoulos, G. Fragkoulis, G. Papadimitriou, D. Gizopoulos, and S. Gurumurthi, “Harpocrates: Breaking the Silence of CPU Faults through Hardware-in-the-Loop Program Generation”, ACM/IEEE International Symposium on Computer Architecture (ISCA 2024), Buenos Aires, Argentina, June 29 – July 3, 2024
M. Hejda, F. Marchesin, G. Papadimitriou, D. Gizopoulos, B. Charbonnier, R. Orobtchouk, P. Bienstman, T. Van Vaerenbergh, and F. Pavanello, “Neuromorphic Architectures based on Augmented Silicon Photonics Platforms”, ACM/EDAC/IEEE Design Automation Conference (DAC 2024), San Francisco, CA, USA, June 23-27, 2024
D. Gizopoulos, G. Papadimitriou, O. Chatzopoulos, N. Karystinos, H. Dixit, and S. Sankar, “Silent Data Corruptions in Computing Systems: Early Predictions and Large-Scale Measurements”, IEEE European Test Symposium (ETS 2024), The Hague, Netherlands, May 20-24, 2024
O. Chatzopoulos, M. Trakosa, G. Papadimitriou, W. Wong, and D. Gizopoulos, “SimPoint-Based Microarchitectural Hotspot & Energy-Efficiency Analysis of RISC-V OoO CPUs”, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2024), Indianapolis, Indiana, USA, May 5-7, 2024
F. Pavanello, C. Marchand, X. Letartre, P. Jimenez, R. Chaves, N. Marastoni, A. Lovato, M. Ceccato, G. Papadimitriou, V. Karakostas, D. Gizopoulos, R. Bardini, T. M. Carmona, S. Di Carlo, A. Savino, L. Lerch, U. Ruhrmair, S. V. Gutiérrez, G. Di Natale, and E. I. Vatajelu, “Security Layers and Related Services Within the Horizon Europe NEUROPULS Project”, Design, Automation, and Test in Europe (DATE 2024), Valencia, Spain, March 25-27, 2024
O. Chatzopoulos, G. Papadimitriou, V. Karakostas, and D. Gizopoulos, “gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC Architectures”, IEEE International Symposium on High-Performance Computer Architecture (HPCA 2024), Edinburgh, Scotland, March 2-6, 2024
HiPEAC Paper Award
D. Agiakatsikas*, G. Papadimitriou*, V. Karakostas, D. Gizopoulos, M. Psarakis, C. Bélanger-Champagne, and E. Blackmore, “Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs”, IEEE/ACM International Symposium on Microarchitecture (MICRO 2023), Toronto, Canada, October 28 – November 1, 2023 (*: joint first authors)
HiPEAC Paper Award
R. Canal, C. Chenet, A. Arelakis, J. M. Arnau, J. L. Berral, A. Call, S. Di Carlo, J. Costa, D. Gizopoulos, V. Karakostas, F. Lubrano, K. Nikas, Y. Nikolakopoulos, B. Otero, G. Papadimitriou, I. Papaefstathiou, D. Pnevmatikatos, D. Raho, A. Rigo, E. Rodríguez, A. Savino, A. Scionti, N. Tampouratzis, and A. Torregrosa, “Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services”, 26th Euromicro Conference on Digital System Design (DSD 2023), Durres, Albania, September 6-8, 2023
G. Papadimitriou, D. Gizopoulos, H. D. Dixit, and S. Sankar, “Silent Data Corruptions: The Stealthy Saboteurs of Digital Integrity”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2023), Crete, Greece, July 3-5, 2023
M. Alonso, D. Andreu, R. Canal, S. Di Carlo, C. Chenet, J. Costa, A. Girones, D. Gizopoulos, V. Karakostas, B. Otero, G. Papadimitriou, E. Rodríguez, and A. Savino, “Validation, Verification, and Testing (VVT) of Future RISC-V Powered Cloud Infrastructures: the Vitamin-V Horizon Europe Project Perspective”, IEEE European Test Symposium (ETS 2023), Venice, Italy, May 22-26, 2023
F. Pavanello, C. Marchand, I. O’Connor, R. Orobtchouk, F. Mandorlo, X. Letartre, S. Cueff, E. Vatajelu, G. Di Natale, B. Cluzel, A. Coillet, B. Charbonnier, P. Noé, F. Kavan, M. Zoldak, M. Szaj, P. Bienstman, T. Van Vaerenbergh, U. Ruhrmair, P. Flores, L. Guerra e Silva, R. Chaves, L. M. Silveira, M. Ceccato, D. Gizopoulos, G. Papadimitriou, V. Karakostas, A. Brando, F. J. Cazorla, R. Canal, P. Closas, A. Gusi-Amigó, P. Crovetti, A. Carpegna, T. Melendez Carmona, S. Di Carlo, and A. Savino, “NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS”, IEEE European Test Symposium (ETS 2023), Venice, Italy, May 22-26, 2023
A. Singh, S. Chakravarty, G. Papadimitriou, and D. Gizopoulos, “Silent Data Errors: Sources, Detection, and Modeling”, IEEE VLSI Test Symposium (VTS 2023), San Diego, CA, USA, April 24-26, 2023
G. Papadimitriou and D. Gizopoulos, “AVGI: Microarchitecture-Driven, Fast and Accurate Vulnerability Assessment”, IEEE International Symposium on High-Performance Computer Architecture (HPCA 2023), Montreal, QC, Canada, February 25 – March 1, 2023
HiPEAC Paper Award
Y. Sazeides, A. Gerber, R. Gabor, A. Bramnik, G. Papadimitriou, D. Gizopoulos, C. Nicopoulos, G. Dimitrakopoulos, and K. Patsidis, “IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming”, IEEE/ACM International Symposium on Microarchitecture (MICRO 2022), Chicago, IL, USA, October 1-5, 2022
HiPEAC Paper Award
D. Sartzetakis, G. Papadimitriou, and D. Gizopoulos, “gpuFI-4: A Microarchitecture-Level Framework for Assessing the Cross-Layer Resilience of Nvidia GPUs”, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2022), Singapore, May 22-24, 2022
Best Paper Candidate
G. Papadimitriou and D. Gizopoulos, “Characterizing Soft Error Vulnerability of CPUs Across Compiler Optimizations and Microarchitectures”, IEEE International Symposium on Workload Characterization (IISWC 2021), Storrs, CT, USA, November 7-9, 2021
I. Tsiokanos, G. Papadimitriou, D. Gizopoulos, and G. Karakonstantis, “Boosting Microprocessor Efficiency: Circuit- and Workload-Aware Assessment of Timing Errors”, IEEE International Symposium on Workload Characterization (IISWC 2021), Storrs, CT, USA, November 7-9, 2021
G. Papadimitriou and D. Gizopoulos, “Demystifying the System Vulnerability Stack: Transient Fault Effects Across the Layers”, ACM/IEEE International Symposium on Computer Architecture (ISCA 2021), Valencia, Spain, June 14-19, 2021
HiPEAC Paper Award
P. Bodmann, G. Papadimitriou, D. Gizopoulos, and P. Rech, “Impact of Cores Integration and Operating System on ARM Processors Reliability: Micro-Architectural Fault-Injection vs Beam Experiments”, IEEE European Conference on Radiation and Its Effects on Components and Systems (RADECS 2020), Toulouse, France, October 2020
A. Chatzidimitriou, G. Papadimitriou, C. Gavanas, G. Katsoridas, and D. Gizopoulos, “Multi-Bit Upsets Vulnerability Analysis of Modern Microprocessors”, IEEE International Symposium on Workload Characterization (IISWC 2019), Orlando, FL, USA, November 3-5, 2019
D. Gizopoulos, G. Papadimitriou, A. Chatzidimitriou, V. J. Reddi, J. Leng, B. Salami, O. S. Unsal, and A. C. Kestelman, “Modern Hardware Margins: CPUs, GPUs, FPGAs”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2019), Rhodes, Greece, July 1-3, 2019
A. Chatzidimitriou, P. Bodmann, G. Papadimitriou, D. Gizopoulos, and P. Rech, “Demystifying Soft Error Assessment Strategies on ARM CPUs: Microarchitectural Fault Injection vs. Neutron Beam Experiments”, IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2019), Portland, OR, USA, June 24-27, 2019
Best Paper Award Runner-Up
A. Chatzidimitriou, G. Papadimitriou, D. Gizopoulos, S. Ganapathy, and J. Kalamatianos, “Assessing the Effects of Low Voltage in Branch Prediction Units”, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2019), Madison, WI, USA, March 24-26, 2019
G. Papadimitriou, A. Chatzidimitriou, and D. Gizopoulos, “Adaptive Voltage/Frequency Scaling and Core Allocation for Balanced Energy and Performance on Multicore CPUs”, IEEE International Symposium on High-Performance Computer Architecture (HPCA 2019), Washington DC, USA, February 16-20, 2019
HiPEAC Paper Award
A. Chatzidimitriou, G. Papadimitriou, D. Gizopoulos, S. Ganapathy, and J. Kalamatianos, “Analysis and Characterization of Ultra Low Power Branch Predictors”, IEEE International Conference on Computer Design (ICCD 2018), Orlando, Florida, USA, October 7-10, 2018
A. Chatzidimitriou, G. Papadimitriou, and D. Gizopoulos, “HealthLog Monitor: A Flexible System-Monitoring Linux Service”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2018), Platja d’Aro, Costa Brava, Spain, July 2-4, 2018
K. Tovletoglou, L. Mukhanov, G. Karakonstantis, A. Chatzidimitriou, G. Papadimitriou, M. Kaliorakis, D. Gizopoulos, Z. Hadjilambrou, Y. Sazeides, A. Lampropulos, S. Das, P. Vo, “Measuring and Exploiting Guardbands of Server-Grade ARMv8 CPU Cores and DRAMs”, IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W 2018), Luxembourg, June 25-28, 2018
G. Papadimitriou, A. Chatzidimitriou, M. Kaliorakis, Y. Vastakis, and D. Gizopoulos, “Micro-Viruses for Fast System- Level Voltage Margins Characterization in Multicore CPUs”, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2018), Belfast, Northern Ireland, United Kingdom, April 2-4, 2018
G. Karakonstantis, K. Tovletoglou, L. Mukhanov, H. Vandierendonck, D. S. Nikolopoulos, P. Lawthers, P. Koutsovasilis, M. Maroudas, C. D. Antonopoulos, C. Kalogirou, N. Bellas, S. Lalis, S. Venugopal, A. Prat-Perez, A. Lampropulos, M. Kleanthous, A. Diavastos, Z. Hadjilambrou, P. Nikolaou, Y. Sazeides, P. Trancoso, G. Papadimitriou, M. Kaliorakis, A. Chatzidimitriou, D. Gizopoulos, and S. Das, “An Energy-Efficient and Error-Resilient Server Ecosystem Exceeding Conservative Scaling Limits”, Design, Automation, and Test in Europe (DATE 2018), Dresden, Germany, March 19-23, 2018
G. Papadimitriou, M. Kaliorakis, A. Chatzidimitriou, D. Gizopoulos, P. Lawthers, and S. Das, “Harnessing Voltage Margins for Energy Efficiency in Multicore CPUs”, IEEE/ACM International Symposium on Microarchitecture (MICRO 2017), Boston, MA, USA, October 14-18, 2017
HiPEAC Paper Award
G. Papadimitriou, M. Kaliorakis, A. Chatzidimitriou, C. Magdalinos, and D. Gizopoulos, “Voltage Margins Identification on Commercial x86-64 Multicore Microprocessors”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2017), Thessaloniki, Greece, July 3-5, 2017 1
G. Papadimitriou, D. Gizopoulos, A. Chatzidimitriou, T. Kolan, A. Koyfman, R. Morad, and V. Sokhin, “Unveiling Difficult Bugs in Address Translation Caching Arrays for Effective Post-Silicon Validation”, IEEE International Conference on Computer Design (ICCD 2016), Phoenix, AZ, October 3-5, 2016
G. Papadimitriou, A. Chatzidimitriou, D. Gizopoulos, and R. Morad, “ISA-Independent Post-Silicon Validation for the Address Translation Mechanisms of Modern Microprocessors”, IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2016), Sant Feliu de Guixols, Spain, July 4-6, 2016
S. Tselonis, M. Kaliorakis, N. Foutris, G. Papadimitriou, and D. Gizopoulos, “Microprocessor Reliability-Performance Tradeoffs Assessment at the Microarchitecture Level”, IEEE VLSI Test Symposium (VTS 2016), Las Vegas, NV, April 25- 27, 2016
Peer-Reviewed Workshop Papers
6
G. Fragkoulis, N. Karystinos, G. Papadimitriou, and D. Gizopoulos, “The RISC-V Hypervisor Extension in gem5”, The gem5 Workshop 2025 (gem5 2025) – in conjunction with the ACM/IEEE International Symposium on Computer Architecture (ISCA 2025), Tokyo, Japan, June 21-25, 2025. with informal proceedings
G. Fragkoulis, N. Karystinos, G. Papadimitriou, and D. Gizopoulos, “Advancing Cloud Computing Capabilities on gem5 by Implementing the RISC-V Hypervisor Extension”, Eighth Workshop on Computer Architecture Research with RISC- V (CARRV 2024) - in conjunction with the IEEE/ACM International Symposium on Microarchitecture (MICRO 2024), Austin, Texas, USA, November 2-6, 2024. with informal proceedings
D. Gizopoulos, G. Papadimitriou, and O. Chatzopoulos, “Estimating the Failures and Silent Errors Rates of CPUs Across ISAs and Microarchitectures”, IEEE International Workshop on Silicon Lifecycle Management (SLM 2023) – in conjunction with the IEEE International Test Conference (ITC 2023), Disneyland, Anaheim, CA, USA, October 8-13, 2023
O. Chatzopoulos, G. Fragkoulis, G. Papadimitriou, and D. Gizopoulos, “Towards Accurate Performance Modeling of RISC-V Designs”, Fifth Workshop on Computer Architecture Research with RISC-V (CARRV 2021) - in conjunction with the ACM/IEEE International Symposium on Computer Architecture (ISCA 2021), Valencia, Spain, June 14-19, 2021. with informal proceedings
G. Papadimitriou, M. Kaliorakis, A. Chatzidimitriou, D. Gizopoulos, G. Favor, K. Sankaran, and S. Das, “A System-Level Voltage/Frequency Scaling Characterization Framework for Multicore CPUs”, IEEE Workshop Silicon Errors in Logic – System Effects Workshop (SELSE 2017), Boston, MA, March 21-22, 2017. with informal proceedings
K. Tovletoglou, C. Chalios, G. Karakonstantis, L. Mukhanov, H. Vandierendonck, D. S. Nikolopoulos, P. Koutsovasilis, M. Maroudas, C. Antonopoulos, C. Kalogirou, N. Bellas, S. Lalis, M. Rafique, S. Venugopal, A. Prat-Perez, A. Diavastos, Z. Hadjilambrou, P. Nikolaou, Y. Sazeides, P. Trancoso, G. Papadimitriou, M. Kaliorakis, A. Chatzidimitriou, D. Gizopoulos, "An Energy-Efficient and Error-Resilient Server Ecosystem Exceeding Conservative Scaling Limits", Workshop on Energy-Efficient Servers for Cloud and Edge Computing (EnESCE 2017), Stockholm, Sweden, January 2017. with informal proceedings
Peer-Reviewed Posters
7
G. Pournaras, V. Karakostas, G. Papadimitriou, and D. Gizopoulos, “Benchmarking Support for RISC-V CPUs in Serverless Computing”, IEEE International Symposium on Workload Characterization (IISWC 2025), Irvine, USA, October 12-14, 2025
L. Yang, G. Papadimitriou, D. Sartzetakis, A. Jog, E. Smirni, and D. Gizopoulos, “Probing Weaknesses in GPU Reliability Assessment: A Cross-Layer Approach”, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2024), Indianapolis, Indiana, USA, May 5-7, 2024
O. Chatzopoulos, G. Papadimitriou, W. Wong, and D. Gizopoulos, “Energy Efficiency of Out-of-Order CPUs: Comparative Study and Microarchitectural Hotspot Characterization of RISC-V Designs”, IEEE International Symposium on Workload Characterization (IISWC 2023), Ghent, Belgium, October 1-3, 2023
O. Chatzopoulos, G. Papadimitriou, V. Karakostas, and D. Gizopoulos, “Enabling Design Space Exploration of RISC-V Accelerator-rich Computing Systems on gem5”, RISC-V Summit Europe (RISC-V Europe 2023), Barcelona, Spain, June 5-9, 2023. informal proceedings
A. Arelakis, J. M. Arnau, J. L. Berral, A. Call, R. Canal, S. Di Carlo, J. Costa, D. Gizopoulos, V. Karakostas, F. Lubrano, K. Nikas, Y. Nikolakopoulos, B. Otero, G. Papadimitriou, I. Papaefstathiou, D. Pnevmatikatos, D. Raho, A. Rigo, E. Rodríguez, A. Savino, A. Scionti, N. Tampouratzis, and A. Torregrosa, “Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services”, RISC-V Summit Europe (RISC-V Europe 2023), Barcelona, Spain, June 5-9, 2023. informal proceedings
Pablo Bodmann, G. Papadimitriou, D. Gizopoulos, and P. Rech, “The Impact of SoC Integration and OS Deployment on the Reliability of Arm Processors”, IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2021), Stony Brook, NY, USA, March 28-30, 2021
G. Papadimitriou, A. Chatzidimitriou, D. Gizopoulos, and R. Morad, “Post-Silicon Validation Methodology for the Address Translation Mechanisms of Modern Microprocessors”, ACM/EDAC/IEEE Design Automation Conference (DAC 2016), Austin, TX, June 2016. informal proceedings
Book Chapters
5
P. Nikolaou, Y. Sazeides, A. Lampropulos, D. Guilhot, A. Bartoli, G. Papadimitriou, A. Chatzidimitriou, D. Gizopoulos, K. Tovletoglou, L. Mukhanov, G. Karakonstantis, M. Kleanthous, and A. Prat, Chapter 6: “Total Cost of Ownership Perspective of Cloud vs Edge Deployments of IoT Applications”, In book: Computing at the EDGE, Editors: G. Karakonstantis, C. J. Gillan, Springer Nature Switzerland, 2022
G. Papadimitriou and D. Gizopoulos, Chapter 3: “Harnessing Voltage Margins for Balanced Energy and Performance”, In book: Computing at the EDGE, Editors: G. Karakonstantis, C. J. Gillan, Springer Nature Switzerland, 2022
G. Papadimitriou and D. Gizopoulos, Chapter 2: “Challenges on Unveiling Voltage Margins from the Node to the Datacentre Level”, In book: Computing at the EDGE, Editors: G. Karakonstantis, C. J. Gillan, Springer Nature Switzerland, 2022
I. Tsiokanos, G. Papadimitriou, D. Gizopoulos, and G. Karakonstantis, Chapter 3: “Hardware Level Approximations”, In book: Approximate Computing Techniques, Editors: A. Bosio, D. Menard, O. Sentieys, Springer Nature Switzerland, 2022
L. Mukhanov, K. Tovletoglou, G. Karakonstantis, G. Papadimitriou, A. Chatzidimitriou, M. Kaliorakis, D. Gizopoulos, and S. Das, Chapter 13: “Improving the Energy Efficiency by Exceeding the Conservative Operating Limits”, In book: Hardware Accelerators in Data Centers, Editors: C. Kachris, B. Falsafi, D. Soudris, Springer International Publishing, 2019
Academic service
Professional Service
Program committees, peer review, and conference organization across computer architecture, dependable systems, and design automation.
IEEEIEEE Transactions on Computers (IEEE TC)IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (IEEE TCAD)IEEE Transactions on Device and Materials Reliability (IEEE TDMR)IEEE Transactions on Emerging Topics in Computing (IEEE TETC)IEEE Transactions on Sustainable Computing (IEEE TSUSC)IEEE Design & Test (IEEE D&T)IEEE Computer Architecture Letters (IEEE CAL)
ACMACM Transactions on Architecture and Code Optimization (ACM TACO)ACM Transactions on Embedded Computing Systems (ACM TECS)ACM Computing Surveys (ACM CSUR)ACM Transactions on Cyber-Physical Systems (ACM TCPS)
ElsevierJournal of Electronic Testing (JETT)Journal of Parallel and Distributed Computing (JPDC)Journal of Systems Architecture (JSA)Journal of Supercomputing (JSC)
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University of Patras
George Papadimitriou
Assistant Professor Computer Engineering & Informatics Department (CEID) School of Engineering · University of Patras
@article{Papadimitriou2023Silent,
author = {G. Papadimitriou and D. Gizopoulos},
title = {Silent Data Corruptions: Microarchitectural Perspectives},
journal = {IEEE Transactions on Computers (IEEE TC)},
year = {2023},
volume = {72},
number = {11},
pages = {3072--3085},
doi = {10.1109/TC.2023.3285094},
url = {https://doi.org/10.1109/TC.2023.3285094}
}@article{Bodmann2023Soft,
author = {P. R. Bodmann and G. Papadimitriou and R. L. Rech Jr and D. Gizopoulos and P. Rech},
title = {Soft Error Effects on Arm Microprocessors: Early Estimations Versus Chip Measurements},
journal = {IEEE Computer (IEEE MC)},
year = {2023},
volume = {56},
number = {7},
pages = {4--6},
doi = {10.1109/MC.2023.3270045},
url = {https://doi.org/10.1109/MC.2023.3270045}
}@article{Papadimitriou2023Anatomy,
author = {G. Papadimitriou and D. Gizopoulos},
title = {Anatomy of On-Chip Memory Hardware Fault Effects Across the Layers},
journal = {IEEE Transactions on Emerging Topics in Computing (IEEE TETC)},
year = {2023},
volume = {11},
number = {2},
pages = {420--431},
doi = {10.1109/TETC.2022.3205808},
url = {https://doi.org/10.1109/TETC.2022.3205808}
}@article{Bodmann2023Soft,
author = {P. R. Bodmann and G. Papadimitriou and R. L. Rech Jr and D. Gizopoulos and P. Rech},
title = {Soft Error Effects on Arm Microprocessors: Early Estimations vs. Chip Measurements},
journal = {IEEE Transactions on Computers (IEEE TC)},
year = {2023},
volume = {71},
number = {10},
pages = {2358--2369},
doi = {10.1109/TC.2021.3128501},
url = {https://doi.org/10.1109/TC.2021.3128501}
}@article{Nikolaou2022Evaluation,
author = {P. Nikolaou and Y. Sazeides and A. Lampropulos and D. Guilhot and A. Bartoli and G. Papadimitriou and A. Chatzidimitriou and D. Gizopoulos and K. Tovletoglou and L. Mukhanov and G. Karakonstantis},
title = {On the Evaluation of the Total-Cost-of-Ownership Trade-offs in Edge vs Cloud deployments: A Wireless-Denial-of-Service Case Study},
journal = {IEEE Transactions on Sustainable Computing (IEEE T-SUSC)},
year = {2022},
volume = {7},
number = {2},
pages = {334--345},
doi = {10.1109/TSUSC.2019.2894018},
url = {https://doi.org/10.1109/TSUSC.2019.2894018}
}@article{Koutsovasilis2022Impact,
author = {P. Koutsovasilis and C. D. Antonopoulos and N. Bellas and S. Lalis and G. Papadimitriou and A. Chatzidimitriou and D. Gizopoulos},
title = {The Impact of CPU Voltage Margins on Power-Constrained Execution},
journal = {IEEE Transactions on Sustainable Computing (IEEE T-SUSC)},
year = {2022},
volume = {7},
number = {1},
pages = {221--234},
doi = {10.1109/TSUSC.2020.3045195},
url = {https://doi.org/10.1109/TSUSC.2020.3045195}
}@article{Papadimitriou2020Exceeding,
author = {G. Papadimitriou and A. Chatzidimitriou and D. Gizopoulos and V. J. Reddi and J. Leng and B. Salami and O. S. Unsal and A. C. Kestelman},
title = {Exceeding Conservative Limits: A Consolidated Analysis on Modern Hardware Margins},
journal = {IEEE Transactions on Device and Materials Reliability (IEEE TDMR)},
year = {2020},
volume = {20},
number = {2},
pages = {341--350},
doi = {10.1109/TDMR.2020.2989813},
url = {https://doi.org/10.1109/TDMR.2020.2989813}
}@article{Chatzidimitriou2019HealthLog,
author = {A. Chatzidimitriou and G. Papadimitriou and D. Gizopoulos},
title = {HealthLog Monitor: Errors, Symptoms and Reactions Consolidated},
journal = {IEEE Transactions on Device and Materials Reliability (IEEE TDMR)},
year = {2019},
volume = {19},
number = {1},
pages = {46--54},
doi = {10.1109/TDMR.2019.2892206},
url = {https://doi.org/10.1109/TDMR.2019.2892206}
}@article{Kaliorakis2018Statistical,
author = {M. Kaliorakis and A. Chatzidimitriou and G. Papadimitriou and D. Gizopoulos},
title = {Statistical Analysis of Multicore CPUs Operation in Scaled Voltage Conditions},
journal = {IEEE Computer Architecture Letters (IEEE CAL)},
year = {2018},
volume = {17},
number = {2},
pages = {109--112},
doi = {10.1109/LCA.2018.2798604},
url = {https://doi.org/10.1109/LCA.2018.2798604}
}@article{Papadimitriou2017Agile,
author = {G. Papadimitriou and A. Chatzidimitriou and D. Gizopoulos and R. Morad},
title = {An Agile Post-Silicon Validation Methodology for the Address Translation Mechanisms of Modern Microprocessors},
journal = {IEEE Transactions on Device and Materials Reliability (IEEE TDMR)},
year = {2017},
volume = {17},
number = {1},
pages = {3--11},
doi = {10.1109/TDMR.2016.2636880},
url = {https://doi.org/10.1109/TDMR.2016.2636880}
}@inproceedings{Nezhadi2025Sisyphus,
author = {A. Nezhadi and O. Chatzopoulos and M. Mayahinia and G. Papadimitriou and M. Tahoori and D. Gizopoulos},
title = {Sisyphus: Cross-Layer Efficiency Across NVM Technologies in Compute-in-Memory Architectures},
booktitle = {IEEE International Test Conference (ITC 2025)},
year = {2025},
doi = {10.1109/ITC58126.2025.00028},
url = {https://doi.org/10.1109/ITC58126.2025.00028}
}@inproceedings{Kotsimpou2025Evaluating,
author = {F. Kotsimpou and G. Papadimitriou and D. Gizopoulos},
title = {Evaluating ECC for Cache Reliability Under Multi-Bit Upsets: A Design Space Exploration},
booktitle = {IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2025)},
year = {2025},
doi = {10.1109/IOLTS65288.2025.11117031},
url = {https://doi.org/10.1109/IOLTS65288.2025.11117031}
}@inproceedings{Trakosa2025NAVIgator,
author = {M. Trakosa and O. Chatzopoulos and G. Papadimitriou and D. Gizopoulos},
title = {NAVIgator: Exploring the Voltage Limits of AMD NAVI GPUs for Energy Efficient Computing},
booktitle = {IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2025)},
year = {2025},
doi = {10.1109/IOLTS65288.2025.11117086},
url = {https://doi.org/10.1109/IOLTS65288.2025.11117086}
}@inproceedings{Chatzopoulos2025From,
author = {O. Chatzopoulos and G. Papadimitriou and D. Gizopoulos and H. Dixit and S. Sankar},
title = {From Gates to SDCs: Understanding Fault Propagation Through the Compute Stack},
booktitle = {Design, Automation, and Test in Europe (DATE 2025)},
year = {2025},
doi = {10.23919/DATE64628.2025.10992727},
url = {https://doi.org/10.23919/DATE64628.2025.10992727}
}@inproceedings{Chatzopoulos2025Veritas,
author = {O. Chatzopoulos and N. Karystinos and G. Papadimitriou and D. Gizopoulos and H. D. Dixit and S. Sankar},
title = {Veritas – Demystifying Silent Data Corruptions: μArch-Level Modeling and Fleet Data of Modern x86 CPUs},
booktitle = {IEEE International Symposium on High-Performance Computer Architecture (HPCA 2025)},
year = {2025},
doi = {10.1109/HPCA61900.2025.00012},
url = {https://doi.org/10.1109/HPCA61900.2025.00012}
}@inproceedings{Alonso2024Security,
author = {M. Alonso and D. Andreu and R. Canal and S. Di Carlo and O. Chatzopoulos and C. Chenet and J. Costa and A. Girones and D. Gizopoulos and G. Papadimitriou and E. Morancho and B. Otero and A. Savino},
title = {Security and RAS in the Computing Continuum},
booktitle = {IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT 2024)},
year = {2024},
doi = {10.1109/DFT63277.2024.10753548},
url = {https://doi.org/10.1109/DFT63277.2024.10753548}
}@inproceedings{Yang2024GPU,
author = {L. Yang and G. Papadimitriou and D. Sartzetakis and A. Jog and E. Smirni and D. Gizopoulos},
title = {GPU Reliability Assessment: Insights Across the Abstraction Layers},
booktitle = {IEEE International Conference on Cluster Computing (CLUSTER 2024)},
year = {2024},
doi = {10.1109/CLUSTER59578.2024.00008},
url = {https://doi.org/10.1109/CLUSTER59578.2024.00008}
}@inproceedings{Macieira2024Silent,
author = {T. Macieira and S. Gurumurthy and S. Gurumurthi and A. Haggag and G. Papadimitriou and D. Gizopoulos},
title = {Silent Data Corruptions in Computing: Understand and Quantify},
booktitle = {IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2024)},
year = {2024},
doi = {10.1109/IOLTS60994.2024.10616056},
url = {https://doi.org/10.1109/IOLTS60994.2024.10616056}
}@inproceedings{Karystinos2024Harpocrates,
author = {N. Karystinos and O. Chatzopoulos and G. Fragkoulis and G. Papadimitriou and D. Gizopoulos and S. Gurumurthi},
title = {Harpocrates: Breaking the Silence of CPU Faults through Hardware-in-the-Loop Program Generation},
booktitle = {ACM/IEEE International Symposium on Computer Architecture (ISCA 2024)},
year = {2024},
doi = {10.1109/ISCA59077.2024.00045},
url = {https://doi.org/10.1109/ISCA59077.2024.00045}
}@inproceedings{Hejda2024Neuromorphic,
author = {M. Hejda and F. Marchesin and G. Papadimitriou and D. Gizopoulos and B. Charbonnier and R. Orobtchouk and P. Bienstman and T. Van Vaerenbergh and F. Pavanello},
title = {Neuromorphic Architectures based on Augmented Silicon Photonics Platforms},
booktitle = {ACM/EDAC/IEEE Design Automation Conference (DAC 2024)},
year = {2024},
doi = {10.1145/3649329.3665347},
url = {https://doi.org/10.1145/3649329.3665347}
}@inproceedings{Gizopoulos2024Silent,
author = {D. Gizopoulos and G. Papadimitriou and O. Chatzopoulos and N. Karystinos and H. Dixit and S. Sankar},
title = {Silent Data Corruptions in Computing Systems: Early Predictions and Large-Scale Measurements},
booktitle = {IEEE European Test Symposium (ETS 2024)},
year = {2024},
doi = {10.1109/ETS61313.2024.10567770},
url = {https://doi.org/10.1109/ETS61313.2024.10567770}
}@inproceedings{Chatzopoulos2024SimPoint,
author = {O. Chatzopoulos and M. Trakosa and G. Papadimitriou and W. Wong and D. Gizopoulos},
title = {SimPoint-Based Microarchitectural Hotspot & Energy-Efficiency Analysis of RISC-V OoO CPUs},
booktitle = {IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2024)},
year = {2024},
doi = {10.1109/ISPASS61541.2024.00021},
url = {https://doi.org/10.1109/ISPASS61541.2024.00021}
}@inproceedings{Pavanello2024Security,
author = {F. Pavanello and C. Marchand and X. Letartre and P. Jimenez and R. Chaves and N. Marastoni and A. Lovato and M. Ceccato and G. Papadimitriou and V. Karakostas and D. Gizopoulos and R. Bardini and T. M. Carmona and S. Di Carlo and A. Savino and L. Lerch and U. Ruhrmair and S. V. Gutiérrez and G. Di Natale and E. I. Vatajelu},
title = {Security Layers and Related Services Within the Horizon Europe NEUROPULS Project},
booktitle = {Design, Automation, and Test in Europe (DATE 2024)},
year = {2024},
doi = {10.23919/DATE58400.2024.10546706},
url = {https://doi.org/10.23919/DATE58400.2024.10546706}
}@inproceedings{Chatzopoulos2024gem5,
author = {O. Chatzopoulos and G. Papadimitriou and V. Karakostas and D. Gizopoulos},
title = {gem5-MARVEL: Microarchitecture-Level Resilience Analysis of Heterogeneous SoC Architectures},
booktitle = {IEEE International Symposium on High-Performance Computer Architecture (HPCA 2024)},
year = {2024},
doi = {10.1109/HPCA57654.2024.00047},
url = {https://doi.org/10.1109/HPCA57654.2024.00047}
}@inproceedings{Agiakatsikas2023Impact,
author = {D. Agiakatsikas* and G. Papadimitriou* and V. Karakostas and D. Gizopoulos and M. Psarakis and C. Bélanger-Champagne and E. Blackmore},
title = {Impact of Voltage Scaling on Soft Errors Susceptibility of Multicore Server CPUs},
booktitle = {IEEE/ACM International Symposium on Microarchitecture (MICRO 2023)},
year = {2023},
doi = {10.1145/3613424.3614304},
url = {https://doi.org/10.1145/3613424.3614304}
}@inproceedings{Canal2023Vitamin,
author = {R. Canal and C. Chenet and A. Arelakis and J. M. Arnau and J. L. Berral and A. Call and S. Di Carlo and J. Costa and D. Gizopoulos and V. Karakostas and F. Lubrano and K. Nikas and Y. Nikolakopoulos and B. Otero and G. Papadimitriou and I. Papaefstathiou and D. Pnevmatikatos and D. Raho and A. Rigo and E. Rodríguez and A. Savino and A. Scionti and N. Tampouratzis and A. Torregrosa},
title = {Vitamin-V: Virtual Environment and Tool-boxing for Trustworthy Development of RISC-V based Cloud Services},
booktitle = {26th Euromicro Conference on Digital System Design (DSD 2023)},
year = {2023},
doi = {10.1109/DSD60849.2023.00050},
url = {https://doi.org/10.1109/DSD60849.2023.00050}
}@inproceedings{Papadimitriou2023Silent,
author = {G. Papadimitriou and D. Gizopoulos and H. D. Dixit and S. Sankar},
title = {Silent Data Corruptions: The Stealthy Saboteurs of Digital Integrity},
booktitle = {IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2023)},
year = {2023},
doi = {10.1109/IOLTS59296.2023.10224870},
url = {https://doi.org/10.1109/IOLTS59296.2023.10224870}
}@inproceedings{Alonso2023Validation,
author = {M. Alonso and D. Andreu and R. Canal and S. Di Carlo and C. Chenet and J. Costa and A. Girones and D. Gizopoulos and V. Karakostas and B. Otero and G. Papadimitriou and E. Rodríguez and A. Savino},
title = {Validation, Verification, and Testing (VVT) of Future RISC-V Powered Cloud Infrastructures: the Vitamin-V Horizon Europe Project Perspective},
booktitle = {IEEE European Test Symposium (ETS 2023)},
year = {2023},
doi = {10.1109/ETS56758.2023.10174216},
url = {https://doi.org/10.1109/ETS56758.2023.10174216}
}@inproceedings{Pavanello2023NEUROPULS,
author = {F. Pavanello and C. Marchand and I. O’Connor and R. Orobtchouk and F. Mandorlo and X. Letartre and S. Cueff and E. Vatajelu and G. Di Natale and B. Cluzel and A. Coillet and B. Charbonnier and P. Noé and F. Kavan and M. Zoldak and M. Szaj and P. Bienstman and T. Van Vaerenbergh and U. Ruhrmair and P. Flores and L. Guerra e Silva and R. Chaves and L. M. Silveira and M. Ceccato and D. Gizopoulos and G. Papadimitriou and V. Karakostas and A. Brando and F. J. Cazorla and R. Canal and P. Closas and A. Gusi-Amigó and P. Crovetti and A. Carpegna and T. Melendez Carmona and S. Di Carlo and A. Savino},
title = {NEUROPULS: NEUROmorphic energy-efficient secure accelerators based on Phase change materials aUgmented siLicon photonicS},
booktitle = {IEEE European Test Symposium (ETS 2023)},
year = {2023},
doi = {10.1109/ETS56758.2023.10173974},
url = {https://doi.org/10.1109/ETS56758.2023.10173974}
}@inproceedings{Singh2023Silent,
author = {A. Singh and S. Chakravarty and G. Papadimitriou and D. Gizopoulos},
title = {Silent Data Errors: Sources, Detection, and Modeling},
booktitle = {IEEE VLSI Test Symposium (VTS 2023)},
year = {2023},
doi = {10.1109/VTS56346.2023.10139970},
url = {https://doi.org/10.1109/VTS56346.2023.10139970}
}@inproceedings{Papadimitriou2023AVGI,
author = {G. Papadimitriou and D. Gizopoulos},
title = {AVGI: Microarchitecture-Driven, Fast and Accurate Vulnerability Assessment},
booktitle = {IEEE International Symposium on High-Performance Computer Architecture (HPCA 2023)},
year = {2023},
doi = {10.1109/HPCA56546.2023.10071105},
url = {https://doi.org/10.1109/HPCA56546.2023.10071105}
}@inproceedings{Sazeides2022IDLD,
author = {Y. Sazeides and A. Gerber and R. Gabor and A. Bramnik and G. Papadimitriou and D. Gizopoulos and C. Nicopoulos and G. Dimitrakopoulos and K. Patsidis},
title = {IDLD: Instantaneous Detection of Leakage and Duplication of Identifiers used for Register Renaming},
booktitle = {IEEE/ACM International Symposium on Microarchitecture (MICRO 2022)},
year = {2022},
doi = {10.1109/MICRO56248.2022.00061},
url = {https://doi.org/10.1109/MICRO56248.2022.00061}
}@inproceedings{Sartzetakis2022gpuFI,
author = {D. Sartzetakis and G. Papadimitriou and D. Gizopoulos},
title = {gpuFI-4: A Microarchitecture-Level Framework for Assessing the Cross-Layer Resilience of Nvidia GPUs},
booktitle = {IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2022)},
year = {2022},
doi = {10.1109/ISPASS55109.2022.00004},
url = {https://doi.org/10.1109/ISPASS55109.2022.00004}
}@inproceedings{Papadimitriou2021Characterizing,
author = {G. Papadimitriou and D. Gizopoulos},
title = {Characterizing Soft Error Vulnerability of CPUs Across Compiler Optimizations and Microarchitectures},
booktitle = {IEEE International Symposium on Workload Characterization (IISWC 2021)},
year = {2021},
doi = {10.1109/IISWC53511.2021.00021},
url = {https://doi.org/10.1109/IISWC53511.2021.00021}
}@inproceedings{Tsiokanos2021Boosting,
author = {I. Tsiokanos and G. Papadimitriou and D. Gizopoulos and G. Karakonstantis},
title = {Boosting Microprocessor Efficiency: Circuit- and Workload-Aware Assessment of Timing Errors},
booktitle = {IEEE International Symposium on Workload Characterization (IISWC 2021)},
year = {2021},
doi = {10.1109/IISWC53511.2021.00022},
url = {https://doi.org/10.1109/IISWC53511.2021.00022}
}@inproceedings{Papadimitriou2021Demystifying,
author = {G. Papadimitriou and D. Gizopoulos},
title = {Demystifying the System Vulnerability Stack: Transient Fault Effects Across the Layers},
booktitle = {ACM/IEEE International Symposium on Computer Architecture (ISCA 2021)},
year = {2021},
doi = {10.1109/ISCA52012.2021.00075},
url = {https://doi.org/10.1109/ISCA52012.2021.00075}
}@inproceedings{Bodmann2020Impact,
author = {P. Bodmann and G. Papadimitriou and D. Gizopoulos and P. Rech},
title = {Impact of Cores Integration and Operating System on ARM Processors Reliability: Micro-Architectural Fault-Injection vs Beam Experiments},
booktitle = {IEEE European Conference on Radiation and Its Effects on Components and Systems (RADECS 2020)},
year = {2020},
doi = {10.1109/RADECS50773.2020.9857727},
url = {https://doi.org/10.1109/RADECS50773.2020.9857727}
}@inproceedings{Chatzidimitriou2019Multi,
author = {A. Chatzidimitriou and G. Papadimitriou and C. Gavanas and G. Katsoridas and D. Gizopoulos},
title = {Multi-Bit Upsets Vulnerability Analysis of Modern Microprocessors},
booktitle = {IEEE International Symposium on Workload Characterization (IISWC 2019)},
year = {2019},
doi = {10.1109/IISWC47752.2019.9042036},
url = {https://doi.org/10.1109/IISWC47752.2019.9042036}
}@inproceedings{Gizopoulos2019Modern,
author = {D. Gizopoulos and G. Papadimitriou and A. Chatzidimitriou and V. J. Reddi and J. Leng and B. Salami and O. S. Unsal and A. C. Kestelman},
title = {Modern Hardware Margins: CPUs, GPUs, FPGAs},
booktitle = {IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2019)},
year = {2019},
doi = {10.1109/IOLTS.2019.8854386},
url = {https://doi.org/10.1109/IOLTS.2019.8854386}
}@inproceedings{Chatzidimitriou2019Demystifying,
author = {A. Chatzidimitriou and P. Bodmann and G. Papadimitriou and D. Gizopoulos and P. Rech},
title = {Demystifying Soft Error Assessment Strategies on ARM CPUs: Microarchitectural Fault Injection vs. Neutron Beam Experiments},
booktitle = {IEEE/IFIP International Conference on Dependable Systems and Networks (DSN 2019)},
year = {2019},
doi = {10.1109/DSN.2019.00018},
url = {https://doi.org/10.1109/DSN.2019.00018}
}@inproceedings{Chatzidimitriou2019Assessing,
author = {A. Chatzidimitriou and G. Papadimitriou and D. Gizopoulos and S. Ganapathy and J. Kalamatianos},
title = {Assessing the Effects of Low Voltage in Branch Prediction Units},
booktitle = {IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2019)},
year = {2019},
doi = {10.1109/ISPASS.2019.00020},
url = {https://doi.org/10.1109/ISPASS.2019.00020}
}@inproceedings{Papadimitriou2019Adaptive,
author = {G. Papadimitriou and A. Chatzidimitriou and D. Gizopoulos},
title = {Adaptive Voltage/Frequency Scaling and Core Allocation for Balanced Energy and Performance on Multicore CPUs},
booktitle = {IEEE International Symposium on High-Performance Computer Architecture (HPCA 2019)},
year = {2019},
doi = {10.1109/HPCA.2019.00033},
url = {https://doi.org/10.1109/HPCA.2019.00033}
}@inproceedings{Chatzidimitriou2018Analysis,
author = {A. Chatzidimitriou and G. Papadimitriou and D. Gizopoulos and S. Ganapathy and J. Kalamatianos},
title = {Analysis and Characterization of Ultra Low Power Branch Predictors},
booktitle = {IEEE International Conference on Computer Design (ICCD 2018)},
year = {2018},
doi = {10.1109/ICCD.2018.00030},
url = {https://doi.org/10.1109/ICCD.2018.00030}
}@inproceedings{Chatzidimitriou2018HealthLog,
author = {A. Chatzidimitriou and G. Papadimitriou and D. Gizopoulos},
title = {HealthLog Monitor: A Flexible System-Monitoring Linux Service},
booktitle = {IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2018)},
year = {2018},
doi = {10.1109/IOLTS.2018.8474119},
url = {https://doi.org/10.1109/IOLTS.2018.8474119}
}@inproceedings{Tovletoglou2018Measuring,
author = {K. Tovletoglou and L. Mukhanov and G. Karakonstantis and A. Chatzidimitriou and G. Papadimitriou and M. Kaliorakis and D. Gizopoulos and Z. Hadjilambrou and Y. Sazeides and A. Lampropulos and S. Das and P. Vo},
title = {Measuring and Exploiting Guardbands of Server-Grade ARMv8 CPU Cores and DRAMs},
booktitle = {IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W 2018)},
year = {2018},
doi = {10.1109/DSN-W.2018.00013},
url = {https://doi.org/10.1109/DSN-W.2018.00013}
}@inproceedings{Papadimitriou2018Micro,
author = {G. Papadimitriou and A. Chatzidimitriou and M. Kaliorakis and Y. Vastakis and D. Gizopoulos},
title = {Micro-Viruses for Fast System- Level Voltage Margins Characterization in Multicore CPUs},
booktitle = {IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2018)},
year = {2018},
doi = {10.1109/ISPASS.2018.00014},
url = {https://doi.org/10.1109/ISPASS.2018.00014}
}@inproceedings{Karakonstantis2018Energy,
author = {G. Karakonstantis and K. Tovletoglou and L. Mukhanov and H. Vandierendonck and D. S. Nikolopoulos and P. Lawthers and P. Koutsovasilis and M. Maroudas and C. D. Antonopoulos and C. Kalogirou and N. Bellas and S. Lalis and S. Venugopal and A. Prat-Perez and A. Lampropulos and M. Kleanthous and A. Diavastos and Z. Hadjilambrou and P. Nikolaou and Y. Sazeides and P. Trancoso and G. Papadimitriou and M. Kaliorakis and A. Chatzidimitriou and D. Gizopoulos and S. Das},
title = {An Energy-Efficient and Error-Resilient Server Ecosystem Exceeding Conservative Scaling Limits},
booktitle = {Design, Automation, and Test in Europe (DATE 2018)},
year = {2018},
doi = {10.23919/DATE.2018.8342175},
url = {https://doi.org/10.23919/DATE.2018.8342175}
}@inproceedings{Papadimitriou2017Harnessing,
author = {G. Papadimitriou and M. Kaliorakis and A. Chatzidimitriou and D. Gizopoulos and P. Lawthers and S. Das},
title = {Harnessing Voltage Margins for Energy Efficiency in Multicore CPUs},
booktitle = {IEEE/ACM International Symposium on Microarchitecture (MICRO 2017)},
year = {2017},
doi = {10.1145/3123939.3124537},
url = {https://doi.org/10.1145/3123939.3124537}
}@inproceedings{Papadimitriou2017Voltage,
author = {G. Papadimitriou and M. Kaliorakis and A. Chatzidimitriou and C. Magdalinos and D. Gizopoulos},
title = {Voltage Margins Identification on Commercial x86-64 Multicore Microprocessors},
booktitle = {IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2017)},
year = {2017},
doi = {10.1109/IOLTS.2017.8046198},
url = {https://doi.org/10.1109/IOLTS.2017.8046198}
}@inproceedings{Papadimitriou2016Unveiling,
author = {G. Papadimitriou and D. Gizopoulos and A. Chatzidimitriou and T. Kolan and A. Koyfman and R. Morad and V. Sokhin},
title = {Unveiling Difficult Bugs in Address Translation Caching Arrays for Effective Post-Silicon Validation},
booktitle = {IEEE International Conference on Computer Design (ICCD 2016)},
year = {2016},
doi = {10.1109/ICCD.2016.7753339},
url = {https://doi.org/10.1109/ICCD.2016.7753339}
}@inproceedings{Papadimitriou2016ISA,
author = {G. Papadimitriou and A. Chatzidimitriou and D. Gizopoulos and R. Morad},
title = {ISA-Independent Post-Silicon Validation for the Address Translation Mechanisms of Modern Microprocessors},
booktitle = {IEEE International Symposium on On-Line Testing and Robust System Design (IOLTS 2016)},
year = {2016},
doi = {10.1109/IOLTS.2016.7604675},
url = {https://doi.org/10.1109/IOLTS.2016.7604675}
}@inproceedings{Tselonis2016Microprocessor,
author = {S. Tselonis and M. Kaliorakis and N. Foutris and G. Papadimitriou and D. Gizopoulos},
title = {Microprocessor Reliability-Performance Tradeoffs Assessment at the Microarchitecture Level},
booktitle = {IEEE VLSI Test Symposium (VTS 2016)},
year = {2016},
doi = {10.1109/VTS.2016.7477300},
url = {https://doi.org/10.1109/VTS.2016.7477300}
}@inproceedings{Gizopoulos2023Estimating,
author = {D. Gizopoulos and G. Papadimitriou and O. Chatzopoulos},
title = {Estimating the Failures and Silent Errors Rates of CPUs Across ISAs and Microarchitectures},
booktitle = {IEEE International Workshop on Silicon Lifecycle Management (SLM 2023)},
year = {2023},
doi = {10.1109/ITC51656.2023.00056},
url = {https://doi.org/10.1109/ITC51656.2023.00056}
}@inproceedings{Pournaras2025Benchmarking,
author = {G. Pournaras and V. Karakostas and G. Papadimitriou and D. Gizopoulos},
title = {Benchmarking Support for RISC-V CPUs in Serverless Computing},
booktitle = {IEEE International Symposium on Workload Characterization (IISWC 2025)},
year = {2025},
doi = {10.1109/IISWC66894.2025.00050},
url = {https://doi.org/10.1109/IISWC66894.2025.00050}
}@inproceedings{Yang2024Probing,
author = {L. Yang and G. Papadimitriou and D. Sartzetakis and A. Jog and E. Smirni and D. Gizopoulos},
title = {Probing Weaknesses in GPU Reliability Assessment: A Cross-Layer Approach},
booktitle = {IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2024)},
year = {2024},
doi = {10.1109/ISPASS61541.2024.00048},
url = {https://doi.org/10.1109/ISPASS61541.2024.00048}
}@inproceedings{Chatzopoulos2023Energy,
author = {O. Chatzopoulos and G. Papadimitriou and W. Wong and D. Gizopoulos},
title = {Energy Efficiency of Out-of-Order CPUs: Comparative Study and Microarchitectural Hotspot Characterization of RISC-V Designs},
booktitle = {IEEE International Symposium on Workload Characterization (IISWC 2023)},
year = {2023},
doi = {10.1109/IISWC59245.2023.00032},
url = {https://doi.org/10.1109/IISWC59245.2023.00032}
}@inproceedings{Bodmann2021Impact,
author = {Pablo Bodmann and G. Papadimitriou and D. Gizopoulos and P. Rech},
title = {The Impact of SoC Integration and OS Deployment on the Reliability of Arm Processors},
booktitle = {IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS 2021)},
year = {2021},
doi = {10.1109/ISPASS51385.2021.00040},
url = {https://doi.org/10.1109/ISPASS51385.2021.00040}
}@incollection{Nikolaou2022Total,
author = {P. Nikolaou and Y. Sazeides and A. Lampropulos and D. Guilhot and A. Bartoli and G. Papadimitriou and A. Chatzidimitriou and D. Gizopoulos and K. Tovletoglou and L. Mukhanov and G. Karakonstantis and M. Kleanthous and A. Prat},
title = {Total Cost of Ownership Perspective of Cloud vs Edge Deployments of IoT Applications},
booktitle = {Computing at the EDGE},
year = {2022},
publisher = {Springer},
doi = {10.1007/978-3-030-74536-3_6},
url = {https://doi.org/10.1007/978-3-030-74536-3_6}
}@incollection{Papadimitriou2022Harnessing,
author = {G. Papadimitriou and D. Gizopoulos},
title = {Harnessing Voltage Margins for Balanced Energy and Performance},
booktitle = {Computing at the EDGE},
year = {2022},
publisher = {Springer},
doi = {10.1007/978-3-030-74536-3_3},
url = {https://doi.org/10.1007/978-3-030-74536-3_3}
}@incollection{Papadimitriou2022Challenges,
author = {G. Papadimitriou and D. Gizopoulos},
title = {Challenges on Unveiling Voltage Margins from the Node to the Datacentre Level},
booktitle = {Computing at the EDGE},
year = {2022},
publisher = {Springer},
doi = {10.1007/978-3-030-74536-3_2},
url = {https://doi.org/10.1007/978-3-030-74536-3_2}
}@incollection{Tsiokanos2022Hardware,
author = {I. Tsiokanos and G. Papadimitriou and D. Gizopoulos and G. Karakonstantis},
title = {Hardware Level Approximations},
booktitle = {Approximate Computing Techniques},
year = {2022},
publisher = {Springer},
doi = {10.1007/978-3-030-94705-7_3},
url = {https://doi.org/10.1007/978-3-030-94705-7_3}
}@incollection{Mukhanov2019Improving,
author = {L. Mukhanov and K. Tovletoglou and G. Karakonstantis and G. Papadimitriou and A. Chatzidimitriou and M. Kaliorakis and D. Gizopoulos and S. Das},
title = {Improving the Energy Efficiency by Exceeding the Conservative Operating Limits},
booktitle = {Hardware Accelerators in Data Centers},
year = {2019},
publisher = {Springer},
doi = {10.1007/978-3-319-92792-3_13},
url = {https://doi.org/10.1007/978-3-319-92792-3_13}
}
