Citations

  1. "An Effective Hybrid Test Data Compression Method Using Scan Chain Compaction and Dictionary-Based Scheme", Kim Taejin, Chun Sunghoon, Kim Yongjoon, Yang Myung-Hoon, Kang Sungho, 17th IEEE Asian Test Symposium, 24-27 Nov. 2008 Page(s): 151-156
  2. "Scan-Chain Partition for High Test-Data Compressibility and Low Shift Power Under Routing Constraint", Wang, S.-J.; Li, K. S.-M.; Chen, S.-C.; Shiu, H.-Y.; Chu, Y.-L.; IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, Volume 28,  Issue 5,  May 2009 Page(s):716 - 727.
  3. "Reducing switching activity by test slice difference technique for test volume compression", Wei-Lin Li, Po-Han Wu, Jiann-Chyi Rau, IEEE International Symposium on Circuits and Systems 24-27 May 2009 Page(s):2986 - 2989
  4. "Efficient Test Pattern Compression Techniques Based on Complementary Huffman Coding", Shyue-Kung Lu, Hei-Ming Chuang, Guan-Ying Lai, Bi-Ting Lai, Ya-Chen Huang, IEEE Circuits and Systems International Conference on Testing and Diagnosis, ICTD,  28-29 April 2009 Page(s):1 - 4
  5. "Survey of Test Data Compression Techniques Emphasizing Code Based Schemes", Usha Sandeep Mehta, K. S. Dasgupta, N. M. Devashrayee, 12th Euromicro Conference on Digital System Design, 27-29 August, 2009
  6. "A Multi-dimensional Pattern Run-Length Method for Test Data Compression", Lung-Jen Lee, Wang-Dauh Tseng,, Rung-Bin Lin, Chen-Lun Lee, IEEE Asian Test Symposium, 23-26 Nov. 2009 Page(s):325 - 330
  7. "A Novel X-ploiting Strategy for Improving Performance of Test Data Compression", M. Yi, H. Liang, L. Zhang, W. Zhan, IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Volume 18,  Issue 2,  Feb. 2010 Page(s):324 - 329