Citations

1. "Accumulator-based pseudo-exhaustive two-pattern generation",  I. Voyiatzis, Journal of Systems Architecture, Volume 53, Issue 11, November 2007, Pages 846-860.
2. "Design-for-Testability Techniques for Arithmetic Circuits", Bo-Yuan Ye; Po-Yu Yeh; Sy-Yen Kuo; Ing-Yi Chen, IEEE Circuits and Systems Int. Testing and Diagnosis Conference, 2009, ICTD 2009, Vol., Issue , 28-29 April 2009 Page(s):1 - 4.
3. "Scalable arithmetic cells for iterative logic array", Bo-Yuan Ye; Po-Yu Yeh; Sy-Yen Kuo; Shyue-Kung Lu, International Conference on Electrical and Computer Engineering, 2008. ICECE 2008, 20-22 Dec. 2008, pp.325 - 330.
4. "Design-for-testability techniques for CORDIC design", Bo-Yuan YePo-Yu Yeh, Sy-Yen Kuo and Ing-Yi Chen, Microelectronics Journal, Volume 40, Issue 10, October 2009, Pages 1436-1440