Citations

1. Improved Modulo 2n+1 Adder Design, S. Timarchi and K. Navi, International Journal of Computer and Information Science and Engineering, Vol. 2, No. 3, Summer 2008, pp. 158-165.
2. An Efficient Architecture for Accumulator-Based Test Generation of SIC Pairs, I. Vogiatzis and C. Efstathiou, 2008 International Conference on Design and Technology of Integrated Systems in Nanoscale Era (DTIS 2008), Tozeur, Tunisia, March 25-27, 2008, pp. 1-11.