Citations

  1. "Efficient Deterministic Test Generation for BIST schemes with LFSR Reseeding", S. Neophytou, M. K. Michael, S. Tragoudas, in Proc. IEEE International On-Line Testing Symposium, pp. 43-48
  2. "Simultaneous Reduction in Test Data Vol-ume and Test Time for TRC-Reseeding", B. Zhou, Y.-Z. Ye and Y.-S. Wang, Proc. of ACM Great Lakes Sympo-sium on VLSI, March 2007, pp. 49-54.
  3. "A fast seed selection technique for cost effective hybrid pattern generation", S. Z. Islam, M.A.M Ali, Australian Journal of Electrical and Electronics Engineering 4 (2), pp. 147-158, 2008
  4. "BIST scheme based on two-dimensional test data compression", Jisuanji Fuzhu Sheji Yu Tuxingxue Xuebao, Journal of Computer-Aided Design and Computer Graphics 21 (4), pp. 481-486+492
  5. "Design of the 2-dimensional test patten compression based on TRC-LFSR structure", B. Zhou, Y.-Z. Ye, Z.-L. Li, X.-C Wu, Journal of Xidian University , vol 36, No 5, Oct. 2009, pp. 945-950