Citations

1. R.A. Patel, M. Benaissa and S. Boussakta "Efficient new approach for modulo 2n-1 addition in RNS", in IEE Proceedings Computers and Digital Techniques, Vol. 153, No. 6, November 2006.
2. Riyaz A. Patel, Mohammed Benaissa, Said Boussakta, "Fast Parallel-Prefix Architectures for Modulo 2n-1 Addition with a Single Representation of Zero", in IEEE Transactions on Computers. , Vol. 56, No. 11, November 2007, pp. 1484-1492.