Citations

1. Algorithmes Paralleles Auto-Adaptatifs et Applications, D. Traore, Ph. D. Thesis, L' Ecole Doctorale "Mathematiques, Sciences et Technologies de l'Information, Informatique", L' Institut Polytechnique de Grenoble, January 2009.
2. Low Power Modulo 2n+1 Adder based on Carry Save Diminished-one Number System, S. Timarchi, O. Kavehei and K. Navi, American Journal of Applied Sciences, Vol. 5, No. 4, January 2008, pp. 312-319
3. Multi-Voltage Low Power Convolvers Using the Polynomial Residue Number System, V. Paliouras, A. Skavantzos and T. Stouraitis, 12th ACM Great Lakes Symposium on VLSI, March 14-15, 2002, New York, USA, pp. 7-11.
4. Low Power Convolvers Using the Polynomial Residue Number System, V. Paliouras, A. Skavantzos and T. Stouraitis, IEEE International Symposium on Circuits and Systems (ISCAS 2002), May 26-29, 2002, Phoenix-Scottsdale, Arizona, USA, Vol. II, pp. 748-751 .
5. A Fixed Delay Infinite-Bit Split Adder Architecture and Its Application in Real-Time Image Processing, A. F. Hajjar, IEEE International Conference on Microelectronics (ICM ´06), Dhahran, Saudi Arabia, December 16-19, 2006, pp. 194-197.
6. The Fastest Modulo 2n±1 Adders, J. Biernat and J. Jablonski, Scientific Reports of the Institute of Engineering Cybernetics, Wroclaw University of Technology, No. 54, 2004.