Citations

1. "Gate-Delay Fault Diagnosis Using the Inject-and-Evaluate Paradigm", H-B. Wang, S-Y. Huang, and J-R. Huang, IEEE International Symposium on Defect & Fault Tolerance in VLSI Systems, pp. 117-122, 2002.
2. "A Modified Inject-and-Evaluate Paradigm for Diagnosing Gate-Delay Faults", H-B. Wang, S-Y. Huang and J-R. Huang, International Journal of Electrical Engineering, vol. 13, no. 2, pp. 185-191, 2006.