Head of the Technology & Computer Architecture Laboratory
Book: Computer Architecture, D. Nikolos, Publishing Company Giourdas, 1st edition 2008, in Greek
Book: Computer Architecture Problems, D. Nikolos, Publishing Company Giourdas, 1st edition 2010, in Greek
Technology & Computer Architecture Laboratory
Computer Engineering & Informatics Departement
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Dimitris Nikolos received the B.Sc. degree in physics, the M.Sc. degree in electronics and the Ph.D. degree in Computer Science, from the University of Athens, Athens, Greece. Since 1999, he is a full Professor in the Computer Engineering and Informatics Department of the University of Patras, Patras, Greece, and head of the Technology and Computer Architecture Laboratory. He has authored or co-authored more than 160 scientific papers in refereed international journals and conferences and holds one USA patent. His main research interests are fault-tolerant computing, computer architecture, area/time/power efficient architectures for arithmetic components, VLSI design, low power design, test and design for testability. Prof. Nikolos was co-recipient of the Best Paper Award for his work "Extending the Viability of IDDQ Testing in the Deep Submicron Era" presented at the 3rd IEEE Int. Symposium on Quality Electronic Design (ISQED 2002). He has served as Program Co-chairman of five IEEE Int. On-Line Testing Workshops. He also served on the program committees for the IEEE Int. On-Line Testing Symposium, the IEEE Int. Symposium on Defect and Fault Tolerance in VLSI systems, the European Dependable Computing Conference, the Design Automation & Test (DATE) Conference, the Int. Workshop on Power & Timing Modeling, Optimization and Simulation (PATMOS), The IEEE International Conference on Electronics, Circuits, and Systems (ICECS), and the IEEE Workshop on Dependable Parallel, Distributed and Network-Centric Systems. He was a Guest Co-editor for the June 2002 special issue of the Journal of Electronic Testing, Theory and Applications (JETTA), which was devoted to the 2001 IEEE International On-Line Testing Workshop. He is a member of the IEEE. |
Fault tolerant computer design
Computer architecture
VLSI circuits and systems design
Testing and design for testability
CAD tools for testing
Low-power design
Arithmetic Units Design
Computer Architecture
Special issues in VLSI systems design
Laboratory of Computer Architecture
Laboratory of Basic ELectronics
Special issues in VLSI testing and design for testability
Design verification and production testing
For the list of publications please click on Publications.
Haridimos T. Vergos, Ph.D title: “Fault Tolerant Cache Memory Design”, 1996.
Current position: Αssociate Professor, Department of Computer Engineering and Informatics, University of Patras.
Xrysovalantis Kavousianos, Ph.D title: “Design of self-Checking Checkers in VLSI Technology”, 2000.
Current position: Assistant Professor, Department of Computer Science, University of Ioannina.
Emmanouil Kalligeros, Ph.D title: “Built-In Self-Test Techniques”, 2005.
Current position: Lecturer, Information and Communication Systems Engineering Department, University of the Aegean.
Maciej Bellos, Ph.D title: “Low Power VLSI Testing Techniques”, 2005.
Current position: Electronics Engineer at Larisa University Hospital.
Giorgos Dimitrakopoulos, Ph.D title: "Datapath design for high-performance microprocessors", 2007.
Current position: Lecturer, Information & Telecommunications Engineering Department, University of Western Macedonia.
Co-advisor
Dimitris Gizopoulos, PhD thesis title: "Architectures of Iterative Logic Arrays in CMOS VLSI Technology with Design for Testability Techniques", 1997
Current position: Associate Professor, Department of Informatics, University of Piraeus.
Themistoklis Haniotakis, Ph.D title: “Design of Self-Checking Circuits in VLSI Technology”, 1998.
Current position: Αssistant Professor, Department of Computer Engineering and Informatics, University of Patras.
Ioannis Voyiatzis, Ph.D title: “Built-in Self-Test Architectures for Digital Circuits in CMOS VLSI Technology”, 1998
Current position: Lecturer, Department of Informatics, Educational Institute of Athens
Yiorgos Tsiatouhas, Ph.D title: “Testing and Design for Testability of VLSI Circuits”, 1999.
Current position: Assistant Professor, Department of Computer Science, University of Ioannina.
Dimitris Bakalis, Ph.D title: “Built-In Self-Test Schemes for VLSI digital circuits”, 2001.
Current position: Lecturer, Physics Department, University of Patras.
Project title: REIN [REliability Improvement of integrated circuits and systems in Nanometer technology]
Funding: 'Thales' research program co-financed by the European Union (European Social Fund-ESF) and Greek national funds.
Duration: 1/11/2011-31/10/2015
Project title: HOLISTIC [Hardware and Software Techniques for Multicore Processor Architectures Reliability Enhancement]
Funding: 'Thales' research program co-financed by the European Union (European Social Fund-ESF) and Greek national funds.
Duration: 1/1/2012-30/9/2015
Project title: Models, Solutions, Methods and Tools for Energy-Aware Design (END), ENIAC Joint Undertaking, Subprogramme SP7 Design Methods and Tools.
Funding: ENIAC Joint Undertaking and national programmes/funding authorities of Belgium, Greece, Italy, and Slovakia.
Duration: 36 months (Starting date: 2010)
Project title: “Design for Testability Techniques for Systems on Chip”
Funding: Technical Chamber of Greece.
Duration: 1-5-2009 / 31-7-2009.
Project title: “VLSI Design and Testing of Functional Units of DSP Processors and Cryptography Systems based on Residue Arithmetic”, ΑΡΧΙΜΗΔΗΣ ΙΙ, ΕΠΕΑΕΚ ΙΙ
Funding: Ministry of Development - GSRT
Duration: 1-2-2005 / 31-12-2007
Project title: “Development of Design and Testing Techniques for Data Processing Units implemented with VLSI Technologies”, PYTHAGORAS, ΕΠΕΑΕΚ ΙΙ
Funding: Ministry of Development - GSRT
Duration: 1-9-2004 / 31-7-2007
Project title: INTRALED (INdustry-driven TRaining for Low-power European Designers)(IST-2001-34631).
Duration: 1-3-2002 / 28-2-2005.
Project title: “Surveillance over the web”,
Funding: Ministry of Development - GSRT (PAVE 1999)
Duration: 1-1-2000 / 31-8-2001
Project title: “Industrial networks transparency”
Funding: Ministry of Development - GSRT (PENED 1999)
Duration 1-3-2000 / 31-7-2001
Project title: “Development of Microelectronics Industrial Products” (ΕΠΕΤ ΙΙ 476).
Funding: Ministry of Development - GSRT
Duration: 1-1-1995, 31-12-1997.
Project title: Evaluation of Technologies for Designing and Testing of Digital Systems, (Educational, 300 hours).
Funding: The European Social Fund via the Labor Ministry.
Duration: 1-10-1995, 31-3-1996.
Project title: Education of high specialization in VLSI Design and Testing (300 hours).
Funding: The European Social Fund via the Labor Ministry.
Duration: 1-1-1993, 31-12-1993.
Project title: “Design for Testability of CMOS VLSI Circuits”, "Hellenic VLSI Design and Prototyping Environment" (STRIDE / HVLSI-DPE).
Duration: 1-7-1992, 31-12-1993.
Project title: “ASIC Design for the interconnection of two processors with a number of sensors”, Hellenic-VLSI - DPE (ESPRIT PROJECT 5622), Application IV.
Duration: 1-6-1991, 31-12-1991.
Project title: “Fieldbus Conformance Testing Services", Information Technology Conformance Testing Services (CTS PROGRAMME).
Funding: The European Community.
Duration: 1-1-1989, 30-9-1990.
Project title: Parallel Computer Systems for Integrated Symbolic and Numeric Processing (SPAN) -ESPRIT project 1588.
Duration: 1-2-1987, 31-12-1989.