Computer Architecture

Syllabus

The student is first introduced to the fundamental concepts of computer organization and technology, along with the contemporary challenges faced by computer architecture. The course then focuses on the concept of Instruction Set Architecture (ISA) as a critical interface between hardware and software. Instruction is based on the RISC-V architecture, a modern, open-source, and modular Reduced Instruction Set Computer (RISC) architecture, which serves as a powerful educational tool for understanding the foundational principles of computer systems. Within this context, students develop basic programming skills in RISC-V assembly language and learn how high-level compiled code is translated into machine instructions. This is followed by an in-depth exploration of performance evaluation metrics and methods, as well as an analysis of the key factors affecting system efficiency.

Subsequently, the course focuses on computer organization and processor design for implementing an instruction set architecture – initially without pipelining techniques. Students study and become familiar with the datapath, the control unit, and their relationship to RISC-V instructions, drawing on knowledge from the courses “Logic Design” and “Fundamental Principles of Computer System Organization and Operation”. The course concludes with an introduction to pipelining, emphasizing both its performance benefits and the complications it introduces.

Course Topics:

• Introduction to computer architecture and technology
• Performance evaluation metrics
• RISC-V Instruction Set Architecture
• Assembly language and machine code
• From high-level code to hardware execution
• Computer arithmetic: representations, operations, and implementation
• Single-cycle processor design: datapath and control unit
• Introduction to pipelining and its impact on performance
• Introduction to the design and operation of cache memories

Upon successful completion of the course, students will be able to:

1. Identify and describe the basic organization of a computer system and its main structural components (processor, memory, input/output).
2. Analyze and compare the performance of computing systems using appropriate metrics.
3. Develop assembly language programs for the RISC-V architecture, demonstrating an understanding of low-level hardware operations.
4. Use and exploit computer architecture simulators (such as RARS) to understand and monitor program execution and processor behavior.
5. Design and describe the operation of a simple central processing unit (CPU) using a single-cycle datapath architecture, with emphasis on the datapath and control unit.
6. Explain the operation and benefits of pipelining, as well as the main techniques for handling hazards.
7. Understand the fundamental principles of memory hierarchy, including cache memories and their impact on system performance.